In Japanese Patent Application Laid-Open Publication No. 2010-21275 (Patent Document 1), Japanese Patent Application Laid-Open Publication No. 2009-38111 (Patent Document 2), Japanese Patent Application Laid-Open Publication No. 2012-89590 (Patent Document 3), and International Publication No. WO 2006/001087 (Patent Document 4), a semiconductor device including a wiring substrate on which chip components such as a semiconductor chip and a capacitor are mounted is described.